Use software-driven testbenches to shorten your development schedules and to save time and money

2017年3月31日 | By News | Filed in: News.


Last month, I blogged about a new Aldec FPGA Prototyping board—the HES-US-440—based on the “big, big, big” Xilinx Virtex UltraScale VU440 FPGA teamed with the Xilinx Zynq Z-7100 SoC. (See “Aldec selected the big, big, big Virtex UltraScale VU440 (and the Zynq SoC) for its new proto board—the HES-US-440.”) Now, Aldec’s Hardware Technical Support Manager Krzysztof Szczur has published an interesting article titled “Software Driven Test of FPGA Prototype,” which describes how you can use this prototyping board to create software-driven testbenches.


Why would you want to do that?


Because a software-driven verification methodology can shorten your development schedule by a lot, especially if you speed it up by moving from slow, software-based simulation to a much, much faster FPGA-based prototyping environment like the one provided by the Aldec HES-US-440.


And because time = money.


In fact, time >> money because you can usually find more money but there’s absolutely, positively no one out there minting time.


Note that this is true whether you’re designing an ASIC or you plan to deploy your design on a Xilinx All Programmable device.




Aldec HES-US-440 Prototyping Board Connection Diagram.jpg


Aldec HES-US-440 FPGA Prototpying Board Connection Diagram



via Xcell Daily Blog articles

March 30, 2017 at 07:54PM


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