Here’s one very short, 80-second video shot late last year at SC15 showing two machine-learning demos running on Xilinx Virtex-7 FPGAs. The first shows an image-recognition algorithm from Auviz Systems running on the Virtex-7 FPGA. The application is written in OpenCL and was compiled for the Virtex-7 FPGA using the Xilinx SDAccel development environment. The FPGA-accelerated version of the algorithm processes 600 images/sec while consuming 28W. The unaccelerated version of the algorithm running on an X86 CPU processes 125 images/sec while consuming 90W. The Virtex-7 FPGA delivers a 15x performance/W improvement in this demo.
The second Virtex-7 FPGA demo, from MulticoreWare, is a vehicle-detection algorithm. MulticoreWare developed this application for FPGA hosting in just three weeks with no prior FPGA design experience using the SDAccel Development Environment. The FPGA-accelerated version of the algorithm runs about 20x faster than on an unaccelerated x86 CPU.
Here’s the 80-second video: