Nearly one year ago, The Dini Group announced the DNPCIe_40G_KU_LL FPGA board based on one of several Xilinx Kintex UltraScale All Programmable devices. (See “DINI Group Announces Immediate Availability of Kintex UltraScale FPGA Board.”) I ran across Mike Dini in his booth earlier this week at the SC15 conference in Austin and found out that The Dini Group has now moved its low-latency TCP Offload Engine IP to this board and the Xilinx Kintex UltraScale architecture and the result is even lower latency. Part of the reason is the faster performance of the 20nm Kintex UltraScale FPGAs but another part, according to Mike Dini, is lower-latency Ethernet PHY and MAC IP from Xilinx that’s been optimized for Xilinx UltraScale devices. These boards are used for high-frequency trading and in these applications every microsecond’s worth of latency reduction is worth a lot of money.
Here’s a photo of The Dini Group’s DNPCIe_40G_KU_LL FPGA board:
Dini Group’s DNPCIe_40G_KU_LL FPGA board based on Xilinx Kintex UltraScale FPGAs
And here’s a block diagram of the board:
Block Diagram of Dini Group’s DNPCIe_40G_KU_LL FPGA board based on Xilinx Kintex UltraScale FPGAs
