The Next Logical Step in C/C++, OpenCL Programming: New environments allow you to maximize code performance.

2015年9月3日 | By News | Filed in: News.


By Mike Santarini and Lawrence Getman, Xilinx, Inc

Prior to 2000, the typical microprocessor largely comprised one giant monolithic processor core with onboard memory and a few other odds and ends, making MPUs relatively straightforward platforms on which to develop next-generation apps. The fastest monolithic MPU of the time, Intel’s Pentium 4 Pro, topped out at just over 4 GHz. For developers, this evolution was great; with every generation, their programs could become more intricate and perform more elaborate functions, and their programs would run faster. But in the early 2000s, the semiconductor industry changed the game, forcing developers to adjust to a new set of rules. The shift started with the realization that if the MPU industry continued to crank up the clock on each new monolithic MPU architecture, given the silicon process technology road map and worsening transistor leakage, MPUs would soon have the same power density as the sun.

It was for this reason that the MPU industry quickly transitioned to a homogeneous multiprocessing architecture, in which computing was distributed to multiple smaller cores running at lower clock rates. Existing programs could not take advantage of the new distributed architectures, however, leaving software developers to figure out ways to develop programs that would run efficiently across multiple processor cores.

Today, the semiconductor industry is changing the game yet again—but this time software developers are welcoming the transition. Faced with another power dilemma, semiconductor and systems companies are turning to FPGA-accelerated heterogeneous processing architectures, which closely pair MPUs with FPGAs to increase system performance at a minimal power cost. This emerging architecture has been most notably leveraged in new data center processing architectures, however advantages of FPGA-accelerated heterogeneous multiprocessing extend beyond data center applications.

Numerous embedded systems using Xilinx’s Zynq-7000 All Programmable SoC have greatly benefited from the devices’ on-chip marriage of ARM processors and programmable logic. Systems created with the upcoming Zynq UltraScale+ MPSoC are bound to be even more impressive.

But to make these FPGA-accelerated heterogeneous architectures practical for mass deployment and accessible to software developers, FPGA vendors have had to develop novel environments. In Xilinx’s case, the company offers three development platforms: SDAccel for data center developers, SDSoC for embedded systems developers, and SDNet for network line card architects and developers. The new Xilinx environments give developers the tools to accelerate their programs by easily programming slow portions of their code onto programmable logic to create optimized systems.

Note: This blog post is an excerpt from the cover story appearing in the new Xcell Software Journal, which just went online. You can read the full article by downloading the PDF of this first issue here or clicking here to read the publication online.


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