Adam Taylor’s MicroZed Chronicles Chronicles Part 78: Zynq SoC Ethernet Part II

2015年4月21日 | By News | Filed in: News.

Source: http://forums.xilinx.com/t5/Xcell-Daily-Blog/Adam-Taylor-s-MicroZed-Chronicles-Chronicles-Part-78-Zynq-SoC/ba-p/592021

 

By Adam Taylor

 

In the previous blog we introduced the Zynq SoC’s Gigabit Ethernet Controller, which provides Media Access Controller (MAC) capability. This is the first step in being able to establish an IP stack. Now we will look at how we can configure the MAC to send and receive packets using the example provided by Xilinx with the SDK, which demonstrates how the MAC works.

 

First, open SDK and create a new blank application referencing a BSP with an enabled Gigabit Ethernet Controller. (This needs to done in Vivado).

 

Image1.jpg

 

The Xilinx SDK comes complete with an example that demonstrates use of the Ethernet MAC to send a frame. I am going to build this instalment around this great example. First things first, however. We need to include those example files within our design. We can do this very simply by clicking on our application, selecting import -> file system, navigating to

 

<Install> /SDK/2014.1/data/embeddedsw/XilinxProcessorIPLib/d rivers/emacps_v2_0/examples

 

and importing the following files:

 

  • c – The example file itself
  • c – This contains a number of function which are of use in the example
  • h – Contains the function definitions of the utilities

 

With these files within your project, you can build the example demonstration and if your board is connected to a terminal program you will see the success (or otherwise) of the demonstration. However, these steps do not help our understanding or allow us to learn about how to configure and use the Zynq SoC’s Ethernet MAC.

 

So let’s take a look at these example files and work out exactly what they do to better understand the MAC. We start with the xemacps_example_intr_dma.c file. The first things this file does is:

  1. Within the declarations, the file defines a number of Rx and Tx buffer descriptors, device ID’s, interrupt ID’s, and register offsets and values.
  2. Declares Global variables for transmitting and receiving Ethernet frames, sets the frame length and the number of frames transmitted and received.

 

The main functionality is contained within EmacPSIntrExample function. This function unlocks the SLCR (System Level Control Registers) and sets up the clocking for the MAC followed by configuring and initializing the MAC using the same approah used with many other peripherals—looking up the configuration and then initializing using pointers to instances.

 

Once initialized, the MAC address is set. This address is contained within the file xemacps_example_util.c and is six bytes long. It’s defined as a char array; in this case it’s 00:0A:35:01:02:03. The MAC address is a unique identifier used to identify each node connected to the network. After the MAC address is set, three handlers are set up to be called when transmission, reception, or errors occur.

 

With the MAC configuration complete, the next step is to establish the DMA buffer descriptors (BDs) for both transmit and receive buffers.

Image2.jpg

 

Buffer Descriptor (BD) structure

 

 

XEmacPs_BdRingCreate(&(XEmacPs_GetRxRing

                                  (EmacPsInstancePtr)),

                                  RX_BD_LIST_START_ADDRESS,

                                  RX_BD_LIST_START_ADDRESS,

                                  XEMACPS_BD_ALIGNMENT,

                                  RXBD_CNT);

 

To create a BD Ring we need five things:

 

  1. The RX or TX pointer instance, which in this case is provided by the XEmacPs_GetRxRing function. There is a similar function for the TX.
  2. The physical start address of the buffer memory – defined earlier in the declarations.
  3. The virtual start address of the buffer memory – this is the same as the physical address because the cache is disabled.
  4. The alignment of the bytes, in this case 4.
  5. The number of buffer descriptors to create.

With the ring created we can clone the buffer descriptor templates for the newly created ring. We do something similar for the transmit ring.

Image3.jpg

 

TX buffer Descriptor after creation and cloning

 

 

The EmacPsSetupIntrSystem function enables the interrupts. This is very similar to most other examples we have looked where we have used interrupts (see blogs 12 and 13 more detailed explanation).

 

The frame is generated and received within the EmacPsDmaSingleFrameIntrExample function. This function uses both the transmit and receive buffer descriptors to send and receive 1000-byte payload frames. With the MAC in loop-back mode, the function simply checks the transmitted frame against the received frame to verify that the example works.

 

How the frame is built is very interesting. An Ethernet frame consists of:

  • 8 Octet Preamble
  • 6 Octet Destination address
  • 6 Octet Source address
  • 2 Octet Ethertype – this defines the type of protocol contained within the payload
  • 46 to 1500 Octet Payload
  • 4 Octet CRC

 

The transmit frame TxFrame is defined as type EthernetFrame. This is a char array of size 1532 chars. The approach taken to create the frame is therefore to use a pointer to address each element of the array and set it to the required value. For this example, the source and destination addresses are set to the same the MAC address. The payload just contains an incrementing counter and the EtherType is set to 1000.

The TxFrame needs to be inserted into the buffer descriptor so we can commit it to the hardware. Within the example, the tx_frame is split across two buffer descriptors to demonstrate how to use multiple BDs while the RX frame is contained within a single BD.

Image4.jpg

 

 

Setting up the BD and committing to Hardware.

 

 

The same process is followed for the Rx buffer descriptor, pointing it towards the RxFrame char array. With the BD for both the Tx and RX established and committed to hardware, the demonstration then enables the transmission:

Image5.jpg

 

 

Once the transmission is complete, the transmit handler is called, the FramesTx counter is incremented, and buffer descriptors are cleaned up. The Tx and Rx frames are then compared with each other to make sure they agree; success or failure is reported.

 

It has taken a long time to explain all of this, however understanding how the MAC works and how we configure it is important if we want to create an IP stack. Stepping through this demo proves that there is nothing too complicated about how we can configure the Zynq SoC’s Ethernet MAC to transfer data.

 

 

 

MicroZed Chronicles.jpg

 

 

Now, you can have convenient, low-cost Kindle access to the first year of Adam Taylor’s MicroZed Chronicles for a mere $7.50. Click here.

 

Please see the previous entries in this MicroZed Chronicles series by Adam Taylor:

Adam Taylor’s MicroZed Chronicles Microzed Chronicles Part 77 – Introducing the Zynq SoC’s Ethernet

Adam Taylor’s MicroZed Chronicles Part 76: Constraints for Relatively Placed Macros

 

Adam Taylor’s MicroZed Chronicles, Part 75: Placement Constraints – Pblocks

 

Adam Taylor’s MicroZed Chronicles, Part 73: Physical Constraints

 

Adam Taylor’s MicroZed Chronicles, Part 73: Working with other Zynq-Based Boards

 

Adam Taylor’s MicroZed Chronicles, Part 72: Multi-cycle Constraints

 

Adam Taylor’s MicroZed Chronicles, Part 70: Constraints—Clock Relationships and Avoiding Metastability

Adam Taylor’s MicroZed Chronicles, Part 70: Constraints—Introduction to timing and defining a clock

 

Adam Taylor’s MicroZed Chronicles Part 69: Zynq SoC Constraints Overview

 

Adam Taylor’s MicroZed Chronicles Part 68: AXI DMA Part 3, the Software

 

Adam Taylor’s MicroZed Chronicles Part 67: AXI DMA II

 

Adam Taylor’s MicroZed Chronicles Part 66: AXI DMA

 

Adam Taylor’s MicroZed Chronicles Part 65: Profiling Zynq Applications II

 

Adam Taylor’s MicroZed Chronicles Part 64: Profiling Zynq Applications

Adam Taylor’s MicroZed Chronicles Part 63: Debugging Zynq Applications

 

Adam Taylor’s MicroZed Chronicles Part 62: Answers to a question on the Zynq XADC

 

Adam Taylor’s MicroZed Chronicles Part 61: PicoBlaze Part Six

 

Adam Taylor’s MicroZed Chronicles Part 60: The Zynq and the PicoBlaze Part 5—controlling a CCD

Adam Taylor’s MicroZed Chronicles Part 59: The Zynq and the PicoBlaze Part 4

 

Adam Taylor’s MicroZed Chronicles Part 58: The Zynq and the PicoBlaze Part 3

 

Adam Taylor’s MicroZed Chronicles Part 57: The Zynq and the PicoBlaze Part Two

 

Adam Taylor’s MicroZed Chronicles Part 56: The Zynq and the PicoBlaze

 

Adam Taylor’s MicroZed Chronicles Part 55: Linux on the Zynq SoC

 

Adam Taylor’s MicroZed Chronicles Part 54: Peta Linux SDK for the Zynq SoC

Adam Taylor’s MicroZed Chronicles Part 53: Linux and SMP

 

Adam Taylor’s MicroZed Chronicles Part 52: One year and 151,000 views later. Big, Big Bonus PDF!

 

Adam Taylor’s MicroZed Chronicles Part 51: Interrupts and AMP

 

Adam Taylor’s MicroZed Chronicles Part 50: AMP and the Zynq SoC’s OCM (On-Chip Memory)

 

Adam Taylor’s MicroZed Chronicles Part 49: Using the Zynq SoC’s On-Chip Memory for AMP Communications

 

Adam Taylor’s MicroZed Chronicles Part 48: Bare-Metal AMP (Asymmetric Multiprocessing)

 

Adam Taylor’s MicroZed Chronicles Part 47: AMP—Asymmetric Multiprocessing on the Zynq SoC

 

Adam Taylor’s MicroZed Chronicles Part 46: Using both of the Zynq SoC’s ARM Cortex-A9 Cores

 

Adam Taylor’s MicroZed Chronicles Part 44: MicroZed Operating Systems—FreeRTOS

 

Adam Taylor’s MicroZed Chronicles Part 43: XADC Alarms and Interrupts 

Adam Taylor’s MicroZed Chronicles MicroZed Part 42: MicroZed Operating Systems Part 4

Adam Taylor’s MicroZed Chronicles MicroZed Part 41: MicroZed Operating Systems Part 3

Adam Taylor’s MicroZed Chronicles MicroZed Part 40: MicroZed Operating Systems Part Two

Adam Taylor’s MicroZed Chronicles MicroZed Part 39: MicroZed Operating Systems Part One

Adam Taylor’s MicroZed Chronicles MicroZed Part 38 – Answering a question on Interrupts

Adam Taylor’s MicroZed Chronicles Part 37: Driving Adafruit RGB NeoPixel LED arrays with MicroZed Part 8

Adam Taylor’s MicroZed Chronicles Part 36: Driving Adafruit RGB NeoPixel LED arrays with MicroZed Part 7

Adam Taylor’s MicroZed Chronicles Part 35: Driving Adafruit RGB NeoPixel LED arrays with MicroZed Part 6

Adam Taylor’s MicroZed Chronicles Part 34: Driving Adafruit RGB NeoPixel LED arrays with MicroZed Part 5

Adam Taylor’s MicroZed Chronicles Part 33: Driving Adafruit RGB NeoPixel LED arrays with the Zynq SoC

Adam Taylor’s MicroZed Chronicles Part 32: Driving Adafruit RGB NeoPixel LED arrays

Adam Taylor’s MicroZed Chronicles Part 31: Systems of Modules, Driving RGB NeoPixel LED arrays

 Adam Taylor’s MicroZed Chronicles Part 30: The MicroZed I/O Carrier Card

Zynq DMA Part Two – Adam Taylor’s MicroZed Chronicles Part 29

The Zynq PS/PL, Part Eight: Zynq DMA – Adam Taylor’s MicroZed Chronicles Part 28  

The Zynq PS/PL, Part Seven: Adam Taylor’s MicroZed Chronicles Part 27

The Zynq PS/PL, Part Six: Adam Taylor’s MicroZed Chronicles Part 26

The Zynq PS/PL, Part Five: Adam Taylor’s MicroZed Chronicles Part 25

The Zynq PS/PL, Part Four: Adam Taylor’s MicroZed Chronicles Part 24

The Zynq PS/PL, Part Three: Adam Taylor’s MicroZed Chronicles Part 23

The Zynq PS/PL, Part Two: Adam Taylor’s MicroZed Chronicles Part 22

The Zynq PS/PL, Part One: Adam Taylor’s MicroZed Chronicles Part 21

Introduction to the Zynq Triple Timer Counter Part Four: Adam Taylor’s MicroZed Chronicles Part 20

Introduction to the Zynq Triple Timer Counter Part Three: Adam Taylor’s MicroZed Chronicles Part 19

Introduction to the Zynq Triple Timer Counter Part Two: Adam Taylor’s MicroZed Chronicles Part 18

Introduction to the Zynq Triple Timer Counter Part One: Adam Taylor’s MicroZed Chronicles Part 17

The Zynq SoC’s Private Watchdog: Adam Taylor’s MicroZed Chronicles Part 16

Implementing the Zynq SoC’s Private Timer: Adam Taylor’s MicroZed Chronicles Part 15

MicroZed Timers, Clocks and Watchdogs: Adam Taylor’s MicroZed Chronicles Part 14

More About MicroZed Interrupts: Adam Taylor’s MicroZed Chronicles Part 13

MicroZed Interrupts: Adam Taylor’s MicroZed Chronicles Part 12

Using the MicroZed Button for Input: Adam Taylor’s MicroZed Chronicles Part 11

Driving the Zynq SoC’s GPIO: Adam Taylor’s MicroZed Chronicles Part 10

Meet the Zynq MIO: Adam Taylor’s MicroZed Chronicles Part 9

MicroZed XADC Software: Adam Taylor’s MicroZed Chronicles Part 8

Getting the XADC Running on the MicroZed: Adam Taylor’s MicroZed Chronicles Part 7

A Boot Loader for MicroZed. Adam Taylor’s MicroZed Chronicles, Part 6 

Figuring out the MicroZed Boot Loader – Adam Taylor’s MicroZed Chronicles, Part 5

Running your programs on the MicroZed – Adam Taylor’s MicroZed Chronicles, Part 4

Zynq and MicroZed say “Hello World”– Adam Taylor’s MicroZed Chronicles, Part 3

Adam Taylor’s MicroZed Chronicles: Setting the SW Scene

Bringing up the Avnet MicroZed with Vivado

 

 

 

 


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