10G, 16K concurrent TCP/UDP sessions, 95% bandwidth, 1 FPGA—see it at SC14 next week in New Orleans

2014年11月15日 | By News | Filed in: News.


Three weeks ago, Intilop announced availability of a TCP Hardware Accelerator (a TCP Offload Engine or TOE) that could handle 16K concurrent TCP sessions. The Intilop TCP accelerator is available pre-ported and tested on an Alpha Data ADM-PCIE-7V3 card, which you can see in action next week in the Xilinx booths (#3903 and #4003) at SC14 (Supercomputing 14) in New Orleans. The Alpha Data ADM-PCIE-7V3 card is based on a Xilinx Virtex-7 VX690T FPGA. For more information, see “Intilop’s FPGA-based TCP Hardware Accelerator manages 16K concurrent TCP sessions.”


You will also be able to see the following data center and HPC (high-performance computing) demos in the Xilinx booths:


  • Key Value Store Acceleration
  • NVMe Flash Storage Platform
  • Low Latency 25G/50G Ethernet MAC
  • Various software-defined development environments



If you’re at SC14, be sure to stop by the booths of various Xilinx Alliance program members for more interesting demos:


  • Alpha Data – Booth #3803: industry-leading FPGA accelerator boards for network processing
  • Auviz Systems – Alpha Data Booth #3803: computer vision and image processing middleware IP
  • Convey Computer – Emerging Technology Booth ET11: Wolverine line of high performance coprocessors
  • The Dini Group – Booth #528: scalable Kintex-7 and Virtex-7 FPGA-based solutions for HPC applications
  • Invea-Tech – Booth #3923: world’s first HPC 100GE transmit/receive data stream on xR4 PCIe cards
  • Micron – Booth #1949: HMC interoperability demos on Xilinx Virtex UltraScale devices
  • Nallatech – Booth #1332: high performance computing and network processing
  • Pico Computing – Booth # 3233: HMC operation on Xilinx Virtex UltraScale devices and a software-defined development environment

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